In the area of data communications, it is desirable to provide multiplexed data communications over a standard carrier. An application of multiplexed communications is to provide a link between a plurality of data terminals to a local host computer.
The Digital Multiplexed Interface (DMI) specification promulgated by AT&T Information Systems establishes a protocol for providing an interface between a computer and a PBX. In North American and Japan, the interface operates over a 1.544 Mbit/s channel (commonly referred to as a T1 channel), over which it provides 23 data communications channels and one signalling channel. Each data channel has a data rate of 64 kbps. In Europe, DMI operates over 2.048 Mbit/s facilities, providing 30 data channels and 1 signalling channel at a 64 kbps rate.
Hence, DMI allows switched access between a plurality of standard data terminals and a host computer over the 23 data channels (using the North America standard). Since the terminals may communicate with the host computer over two twisted pairs of wires, the DMI is a cost effective interface. The user may communicate with a host computer connected to his PBX, or with a host computer connected to a second PBX connected to the user's PBX.
DMI provides a fully implementable standard which is compatible with the Integrated Services Digital Network (ISDN) defined by the CCITT. A physical layer of DMI is based on the T1 carrier scheme. A frame format consists of 24 eight-bit words (octets) and one frame bit, resulting in a total 193 bits per frame. The 24 octets provide 24 communications channels; channels 1-23 carry data, while channel 24 provides signalling information relevant to channels 1-23.
Many T1 facilities have a "ones-density" requirement specifying the number of consecutive zeros which may be transmitted before a one is transmitted. The purpose of the ones-density requirement is to maintain the timing and synchronization of the communication equipment. A solution to the ones-density requirement is to use an inverted HDLC-based protocol. The DMI version of HDLC allows no more than seven consecutive ones to be transmitted without transmission of a zero; thus, an inverted HDLC data stream can contain no more than seven consecutive zeros. To implement the HDLC requirement, zeros are "stuffed" into the data stream during transmission; upon receiving the data stream, stuffed zeros are removed to recover the original data.
Presently available systems implementing DMI process the eight-bit communication channels in a parallel fashion. These systems use a standard chip set to support the physical layer; use of the standard chip set mandates conformance with the standard of twenty-four eight-bit data channels. Furthermore, HDLC processing is performed in parallel on a per-channel basis. Currently available HDLC processing chips allow up to two channels to be processed simultaneously, necessitating twelve chips to handle the full twenty-four channels.
A problem associated with present day systems is their rigid conformance to the present DMI specification. As ISDN is an evolving standard, and since DMI is intended to evolve with ISDN, it is desirable to implement the DMI interface such that the implementation may evolve with the specification. However, because of their reliance on parallel processing of eight-bit channels, present day systems would require substantial hardware modifications in order to meet future needs for data channels having transmission rates greater than 64 kbps. For example, further implementations may allow for different configurations of the 192 data bits provided in the T1 frame. One such configuration might allow for four eight-bit data channels and ten sixteen-bit data channels, or for a single 192 bit data channel. Also, it may be desirable in the future to deviate from the present standard of a 193-bit frame. In conclusion, any change in the framing configuration will render present day implementations obsolete.
Since present day systems cannot accommodate changes in the data channel bandwidth configuration, they cannot perform statistical multiplexing wherein a user with higher bandwidth requirements can be allocated additional channels, either by the user's request or by statistical analysis of the user's channel usage. Statistical multiplexing capability will be an important feature in future telecommunications systems.
HDLC chip sets further restrict the performance of present day DMI implementations, limiting the implementation to the HDLC protocol. Furthermore, the HDLC chips cannot selectively process bits in a channel's bit stream, and are therefore inoperable to process a 56 kbps mode using "rate adaption" wherein only seven bits of each eight bit data unit is used for data and the eighth bit is always set to one. Sinc HDLC processing in the 56 kbps mode is performed only on the seven data bits, the HDLC chips cannot be used effectively in a DMI implementation if a 56 kbps mode is a requirement of the system.
Therefore, a need exists in the industry to provide a method and apparatus for multiplexed data communications whereby the multiplexed data stream may be processed in a serial fashion to allow for flexibility in framing data and in protocol processing. Specifically, a need exists for a method and apparatus which allows the length of a frame and the configuration of data channels therein to be easily modified. Further, a need exists for a DMI implementation which can modify the bandwidth of data channels in response to a user's needs. Additionally, a need exists for a method and apparatus for multiplexed data communications with adaptable protocol processing.